PURPOSE
CS 665 is a graduate level presentation of the fundamentals of the architecture and design of uniprocessor digital computers. Quantitative measures of performance and cost are emphasized, and design features and tradeoffs are evaluated in relation to performance enhancement and cost reduction. A pedagogical pattern in the course is the identification of a performance bottleneck and the resolution of the bottleneck. What makes the subject interesting (and difficult) is the conflict between individual design objectives. In other words, the ``solution" to one problem exacerbates another problem. In this course, we examine the forces that are at work as much as possible in isolation. We concentrate on the RISC revolution, and on the forces of greatest contemporary importance.
INTENDED AUDIENCE
The intended audience is mainly CS and CE graduate students. The course, though highly quantitative, does not require any advanced mathematics. Familiarity with a large technical data base and a relatively small collection of abstract principles is required for meaningful mastery of the subject.
TEXTBOOK/READINGS
There is one required text: Computer Architecture: A Quantitative Approach, by J. Hennessy and D. Patterson (2nd ed., Morgan-Kaufman, 1995). Planned coverage includes all chapters except for the last on multi-processor parallelism. A supplementary (recommended) text is High Performance Computing, by K. Dowd (O'Reilly, 1994) Additional supplements from Netlib and the World Wide Web will be distributed electronically.
TOPICS:
0. Technology Drivers 1. Performance Measures 2. Instruction Sets 3. Processor Implementation 4. Pipelining and Other Advanced Uni-processor Concurrency Techniques 5. Memory Hierarchy 6. I/O 7. Trends in Commercial Processors and Market Drivers