NOTE: Exams are due by 12 noon on Thursday December 12. Exams submitted electronically in an editable form (HTML, most wordprocessor formats, ascii) will be graded and results posted by e-mail to you. I will verify exam submissions by e-mail as soon as they are received.
Compare Write
Through vs Write
Once cache
protocols.
Your comparison should include
a definition of cost/benefit metrics which could be used in this evaluation.
How would you decide which protocol is better for a given application? (develop a formula using the metrics defined above. e.g. if X < Y then write through is better).
Discuss the security of amoeba capabilities. In particular discuss the following questions:
Can a process generate a valid owner capability?
Can a process steal a valid owner capability?
Can a process modify a valid non-owner capability to become the owner?
In amoeba, a process generates a 64 bit FLIP address at random. How safe is this approach?
A malicious process is trying to impersonate a existing server (whose put-port is known) by generating a 48 bit random number, putting it through the known one-way function and see if the put-port is generated. If each number takes 1 msec to verify, how long will it take to guess the get-port address on the average? best case? worst case?
Amoeba's fault tolerant group commuications can survive the loss of up to k processors. Discuss the special cases when k=0 and when k=n (where n is the number of processors in the original group). Be sure to give the communications complexity in terms of the number of packets sent for normal and abnormal operations).
Given the
inherently stochastic nature of a distributed environment
(due to, among other factors, network congestion,
processors load, autonomous actions by independent
users), explore the value of the different memory
consistency models (strict, sequential, causal, PRAM) as follows. For each model, name an
application (or part of an application) which requires AT
LEAST as strong a model to run correctly according to
expected behavior for that application (as defined by
you, but which should be defensible).
NOTE: there should be no explicitly programmed
synchronization used (like semaphores, ie. should not
resort to a weak consistency model to work correctly)
NOTE: you may also argue that there does not exist any
real applications which require that model (and why).
(Extra Credit) Using the LINDA tuple distributed memory system, design a data flow computation system (similar to that proposed in the wild/gupta dataflow architecture) for computing expressions containing the basic arithmetic binary operations (+,-,*,/). The data flow diagram in this case represents the syntax tree for binary expressions (eg. a+b, a - b/c, (x - y)*z/(m + n)). Your design should include
the make up of the tuple(s) needed to implement a data flow driven computation (considering whether to represent the node, arc, or both in a tuple)
Discuss the nature of the processors required. For example, would you propose special purpose or general purpose processors?
Taking example(s) you consider suitable, give the set of LINDA operations which would load the tuple space with the data flow operations for that example(s).
Give an algorithm which performs the data flow computation (in psuedo code but using LINDA operations to access the tuple space).
Discuss ways to partition the tuple space to achieve effective distribution of the memory.